ARM Cortex-M4 - VCVT between Floating-Point and Fixed-Point

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-132
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3.11.5 VCVT between floating-point and fixed-point
Converts a value in a register from floating-point to and from fixed-point.
Syntax
VCVT{cond}.Td.F32 Sd, Sd, #fbits
VCVT{cond}.F32.Td Sd, Sd, #fbits
where:
cond Is an optional condition code, see Conditional execution on page 3-18.
Td Specifies the data type for the fixed-point number. It must be one of:
•
S16 signed 16-bit value.
•
U16 unsigned 16-bit value.
•
S32 signed 32-bit value.
•
U32 unsigned 32-bit value.
Sd Specifies the destination register and the operand register.
fbits Specifies the number of fraction bits in the fixed-point number:
•If
Td is S16 or U16 , fbits must be in the range 0-16.
•I f
Td is S32 or U32 , fbits must be in the range 1-32.
Operation
These instructions:
1. Either:
• converts a value in a register from floating-point to fixed-point
• converts a value in a register from fixed-point to floating-point.
2. Places the result in a second register.
The floating-point values are single-precision.
The fixed-point value can be 16-bit or 32-bit. Conversions from fixed-point values take their
operand from the low-order bits of the source register and ignore any remaining bits.
Signed conversions to fixed-point values sign-extend the result value to the destination register
width.
Unsigned conversions to fixed-point values zero-extend the result value to the destination
register width.
The floating-point to fixed-point operation uses the
Round towards Zero rounding mode. The
fixed-point to floating-point operation uses the
Round to Nearest rounding mode.
Restrictions
There are no restrictions.
Condition flags
These instructions do not change the flags.