The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-129
ID121610 Non-Confidential
3.11.2 VADD
Floating-point Add.
Syntax
VADD{cond}.F32 {Sd,} Sn, Sm
where:
cond
Is an optional condition code, see Conditional execution on page 3-18.
Sd
Specifies the destination floating-point value.
Sn, Sm
Are the operand floating-point values.
Operation
This instruction:
1. Adds the values in the two floating-point operand registers.
2. Places the results in the destination floating-point register.
Restrictions
There are no restrictions.
Condition flags
This instruction does not change the flags.
Examples
VADD.F32 S4, S6, S7
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