ARM Cortex-M4 - Bitfield Instructions

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-114
ID121610 Non-Confidential
3.9 Bitfield instructions
Table 3-12 shows the instructions that operate on adjacent sets of bits in registers or bitfields:
Table 3-12 Packing and unpacking instructions
Mnemonic Brief description See
BFC Bit Field Clear BFC and BFI on page 3-115
BFI Bit Field Insert BFC and BFI on page 3-115
SBFX Signed Bit Field Extract SBFX and UBFX on page 3-116
SXTB Sign extend a byte SXT and UXT on page 3-117
SXTH Sign extend a halfword SXT and UXT on page 3-117
UBFX Unsigned Bit Field Extract SBFX and UBFX on page 3-116
UXTB Zero extend a byte SXT and UXT on page 3-117
UXTH Zero extend a halfword SXT and UXT on page 3-117