ARM Cortex-M4 - Page 164

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-117
ID121610 Non-Confidential
3.9.3 SXT and UXT
Sign extend and Zero extend.
Syntax
SXTextend{cond} {Rd,} Rm {, ROR #n}
UXTextend{cond} {Rd}, Rm {, ROR #n}
where:
extend Is one of:
B Extends an 8-bit value to a 32-bit value.
H Extends a 16-bit value to a 32-bit value.
cond Is an optional condition code, see Conditional execution on page 3-18.
Rd Specifies the destination register.
Rm Specifies the register holding the value to extend.
ROR #n Is one of:
ROR #8 Value from Rm is rotated right 8 bits.
ROR #16 Value from Rm is rotated right 16 bits.
ROR #24 Value from Rm is rotated right 24 bits.
If
ROR #n is omitted, no rotation is performed.
Operation
These instructions do the following:
1. Rotate the value from
Rm right by 0, 8, 16 or 24 bits.
2. Extract bits from the resulting value:
•
SXTB extracts bits[7:0] and sign extends to 32 bits.
•
UXTB extracts bits[7:0] and zero extends to 32 bits.
•
SXTH extracts bits[15:0] and sign extends to 32 bits.
•
UXTH extracts bits[15:0] and zero extends to 32 bits.
Restrictions
Do not use SP and do not use PC.
Condition flags
These instructions do not affect the flags.
Examples
SXTH R4, R6, ROR #16 ; Rotate R6 right by 16 bits, then obtain the lower
; halfword of the result and then sign extend to
; 32 bits and write the result to R4.
UXTB R3, R10 ; Extract lowest byte of the value in R10 and zero
; extend it, and write the result to R3.