ARM Cortex-M4 - VDIV; Divides Floating-Point Values

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-134
ID121610 Non-Confidential
3.11.7 VDIV
Divides floating-point values.
Syntax
VDIV{cond}.F32 {Sd,} Sn, Sm
where:
cond Is an optional condition code, see Conditional execution on page 3-18.
Sd Specifies the destination register.
Sn, Sm Are the operand registers.
Operation
This instruction:
1. Divides one floating-point value by another floating-point value.
2. Writes the result to the floating-point destination register.
Restrictions
There are no restrictions.
Condition flags
These instructions do not change the flags.