ARM Cortex-M4 - B, BL, BX, and BLX

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-119
ID121610 Non-Confidential
3.10.1 B, BL, BX, and BLX
Branch instructions.
Syntax
B{cond} label
BL{cond} label
BX{cond} Rm
BLX{cond} Rm
where:
B Is branch (immediate).
BL Is branch with link (immediate).
BX Is branch indirect (register).
BLX Is branch indirect with link (register).
cond Is an optional condition code, see Conditional execution on page 3-18.
label Is a PC-relative expression. See PC-relative expressions on page 3-17.
Rm Is a register that indicates an address to branch to. Bit[0] of the value in Rm must
be 1, but the address to branch to is created by changing bit[0] to 0.
Operation
All these instructions cause a branch to
label , or to the address indicated in Rm . In addition:
•The
BL and BLX instructions write the address of the next instruction to LR (the link
register, R14).
•The
BX and BLX instructions result in a UsageFault exception if bit[0] of Rm is 0.
Bcond label is the only conditional instruction that can be either inside or outside an IT block.
All other branch instructions must be conditional inside an IT block, and must be unconditional
outside the IT block, see IT on page 3-122.
Table 3-14 shows the ranges for the various branch instructions.
Table 3-14 Branch ranges
Instruction Branch range
B label −16 MB to +16 MB
Bcond label (outside IT block)
−1 MB to +1 MB
Bcond label (inside IT block)
−16 MB to +16 MB
BL{cond} label
−16 MB to +16 MB
BX{cond} Rm
Any value in register
BLX{cond} Rm
Any value in register