ARM Cortex-M4 - SXT and UXT

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-110
ID121610 Non-Confidential
3.8.2 SXT and UXT
Sign extend and Zero extend.
Syntax
op{cond} {Rd,} Rm {, ROR #n}
op{cond} {Rd}, Rm {, ROR #n}
where:
op Is one of:
SXTB Sign extends an 8-bit value to a 32-bit value.
SXTH Sign extends a 16-bit value to a 32-bit value.
SXTB16 Sign extends two 8-bit values to two 16-bit values.
UXTB Zero extends an 8-bit value to a 32-bit value.
UXTH Zero extends a 16-bit value to a 32-bit value.
UXTB16 Zero extends two 8-bit values to two 16-bit values.
cond Is an optional condition code, see Conditional execution on page 3-18.
Rd Specifies the destination register.
Rm Specifies the register holding the value to extend.
ROR #n Is one of:
ROR #8 Value from Rm is rotated right 8 bits.
ROR #16 Value from Rm is rotated right 16 bits.
ROR #24 Value from Rm is rotated right 24 bits.
If
ROR #n is omitted, no rotation is performed.
Operation
These instructions do the following:
1. Rotate the value from
Rm right by 0, 8, 16 or 24 bits.
2. Extract bits from the resulting value:
•
SXTB extracts bits[7:0] and sign extends to 32 bits.
•
UXTB extracts bits[7:0] and zero extends to 32 bits.
•
SXTH extracts bits[15:0] and sign extends to 32 bits.
•
UXTH extracts bits[15:0] and zero extends to 32 bits.
•
SXTB16 extracts bits[7:0] and sign extends to 16 bits, and extracts bits [23:16] and
sign extends to 16 bits.
•
UXTB16 extracts bits[7:0] and zero extends to 16 bits, and extracts bits [23:16] and
zero extends to 16 bits.
Restrictions
Do not use SP and do not use PC.
Condition flags
These instructions do not affect the flags.