ARM Cortex-M4 - Fault Status Registers and Fault Address Registers; Lockup

The Cortex-M4 Processor
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 2-31
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2.4.3 Fault status registers and fault address registers
The fault status registers indicate the cause of a fault. For BusFaults and MemManage faults,
the fault address register indicates the address accessed by the operation that caused the fault,
as shown in Table 2-19.
2.4.4 Lockup
The processor enters a lockup state if a fault occurs when executing the NMI or HardFault
handlers. When the processor is in lockup state it does not execute any instructions. The
processor remains in lockup state until either:
• it is reset
• an NMI occurs
• it is halted by a debugger.
Note
If lockup state occurs from the NMI handler a subsequent NMI does not cause the processor to
leave lockup state.
Table 2-19 Fault status and fault address registers
Handler
Status register
name
Address register
name
Register description
HardFault HFSR - HardFault Status Register on page 4-30
MemManage MMFSR MMFAR MemManage Fault Status Register on page 4-25
MemManage Fault Address Register on page 4-30
BusFault BFSR BFAR BusFault Status Register on page 4-26
BusFault Address Register on page 4-31
UsageFault UFSR - UsageFault Status Register on page 4-28