ARM Cortex-M4 - Vnmla, Vnmls, Vnmul

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-150
ID121610 Non-Confidential
3.11.23 VNMLA, VNMLS, VNMUL
Floating-point multiply with negation followed by add or subtract.
Syntax
VNMLA{cond}.F32 Sd, Sn, Sm
VNMLS{cond}.F32 Sd, Sn, Sm
VNMUL{cond}.F32 {Sd,} Sn, Sm
where:
cond Is an optional condition code, see Conditional execution on page 3-18.
Sd Specifies the destination floating-point register.
Sn, Sm Are the operand floating-point registers.
Operation
The
VNMLA instruction:
1. Multiplies two floating-point register values.
2. Adds the negation of the floating-point value in the destination register to the negation of
the product.
3. Writes the result back to the destination register.
The
VNMLS instruction:
1. Multiplies two floating-point register values.
2. Adds the negation of the floating-point value in the destination register to the product.
3. writes the result back to the destination register.
The
VNMUL instruction:
1. Multiplies together two floating-point register values.
2. Writes the negation of the result to the destination register.
Restrictions
There are no restrictions.
Condition flags
These instructions do not change the flags.