ARM Cortex-M4 - System Timer (SysTick)

Cortex-M4 Peripherals
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 4-33
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4.4 System timer, SysTick
The processor has a 24-bit system timer, SysTick, that counts down from the reload value to
zero, reloads, that is wraps to, the value in the SYST_RVR register on the next clock edge, then
counts down on subsequent clocks.
Note
When the processor is halted for debugging the counter does not decrement.
The system timer registers are:
4.4.1 SysTick Control and Status Register
The SysTick SYST_CSR register enables the SysTick features. The register resets to
0x00000000 , or to 0x00000004 if your device does not implement a reference clock. See the
register summary in Table 4-32 for its attributes. The bit assignments are:
Table 4-32 System timer registers summary
Address Name Type
Required
privilege
Reset value Description
0xE000E010 SYST_CSR RW Privileged
a
SysTick Control and Status Register
0xE000E014 SYST_RVR RW Privileged Unknown SysTick Reload Value Register on page 4-34
0xE000E018 SYST_CVR RW Privileged Unknown SysTick Current Value Register on page 4-35
0xE000E01C SYST_CALIB RO Privileged
-
a
SysTick Calibration Value Register on page 4-35
a. See the register description for more information.
0Reserved
31 17 16 15 3 2 1 0
Reserved 0 0
COUNTFLAG
CLKSOURCE
TICKINT
ENABLE
Table 4-33 SysTick SYST_CSR register bit assignments
Bits Name Function
[31:17] - Reserved.
[16] COUNTFLAG Returns 1 if timer counted to 0 since last time this was read.
[15:3] - Reserved.