The Cortex-M4 Processor
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 2-4
ID121610 Non-Confidential
General-purpose registers
R0-R12 are 32-bit general-purpose registers for data operations.
Stack Pointer
The Stack Pointer (SP) is register R13. In Thread mode, bit[1] of the CONTROL register
indicates the stack pointer to use:
•0 = Main Stack Pointer (MSP). This is the reset value.
•1 = Process Stack Pointer (PSP).
On reset, the processor loads the MSP with the value from address
0x00000000
.
Link Register
The Link Register (LR) is register R14. It stores the return information for subroutines, function
calls, and exceptions. On reset, the processor sets the LR value to
0xFFFFFFFF.
Program Counter
The Program Counter (PC) is register R15. It contains the current program address. On reset,
the processor loads the PC with the value of the reset vector, which is at address
0x00000004
.
Bit[0] of the value is loaded into the EPSR T-bit at reset and must be 1.
Program Status Register
The Program Status Register (PSR) combines:
• Application Program Status Register (APSR)
• Interrupt Program Status Register (IPSR)
• Execution Program Status Register (EPSR).
These registers are mutually exclusive bitfields in the 32-bit PSR. The bit assignments are:
Access these registers individually or as a combination of any two or all three registers, using
the register name as an argument to the
MSR
or
MRS
instructions. For example:
• read all of the registers using
PSR
with the
MRS
instruction
• write to the APSR N, Z, C, V, and Q bits using
APSR_nzcvq
with the
MSR
instruction.
25 24 23
Reserved ISR_NUMBER
31 30 29 28 27
NZCV
0
Reserved
APSR
IPSR
EPSR
Reserved Reserved
26 16 15 10 9
ReservedICI/IT ICI/ITT
Q
8
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