ARM Cortex-M4 - SBFX and UBFX

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-116
ID121610 Non-Confidential
3.9.2 SBFX and UBFX
Signed Bit Field Extract and Unsigned Bit Field Extract.
Syntax
SBFX{cond} Rd, Rn, #lsb, #width
UBFX{cond} Rd, Rn, #lsb, #width
where:
cond Is an optional condition code, see Conditional execution on page 3-18.
Rd Specifies the destination register.
Rn Specifies the source register.
lsb Specifies the position of the least significant bit of the bitfield. lsb must be in the
range 0 to 31.
width Specifies the width of the bitfield and must be in the range 1 to 32− lsb .
Operation
SBFX extracts a bitfield from one register, sign extends it to 32 bits, and writes the result to the
destination register.
UBFX extracts a bitfield from one register, zero extends it to 32 bits, and writes the result to the
destination register.
Restrictions
Do not use SP and do not use PC
.
Condition flags
These instructions do not affect the flags.
Examples
SBFX R0, R1, #20, #4 ; Extract bit 20 to bit 23 (4 bits) from R1 and sign
; extend to 32 bits and then write the result to R0.
UBFX R8, R11, #9, #10 ; Extract bit 9 to bit 18 (10 bits) from R11 and zero
; extend to 32 bits and then write the result to R8.