The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-147
ID121610 Non-Confidential
3.11.20 VMSR
Move to floating-point System Register from ARM Core register.
Syntax
VMSR{cond} FPSCR, Rt
where:
cond
Is an optional condition code, see Conditional execution on page 3-18.
Rt
Specifies the general-purpose register to be transferred to the FPSCR.
Operation
This instruction moves the value of a general-purpose register to the FPSCR. See Floating-point
Status Control Register on page 4-50 for more information.
Restrictions
The restrictions are:
• Rt cannot be PC or SP.
Condition flags
This instruction updates the FPSCR.
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