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ARM Cortex-M4 - Busfault Status Register; BFSR Bit Assignments

ARM Cortex-M4
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Cortex-M4 Peripherals
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 4-26
ID121610 Non-Confidential
BusFault Status Register
The flags in the BFSR indicate the cause of a bus access fault. The bit assignments are:
BFARVALID
LSPERR
STKERR UNSTKERR
76543210
IBUSERR
PRECISERR
IMPRECISERR
Reserved
Table 4-26 BFSR bit assignments
Bits Name Function
[7] BFARVALID BusFault Address Register (BFAR) valid flag:
0 = value in BFAR is not a valid fault address
1 = BFAR holds a valid fault address.
The processor sets this bit to 1 after a BusFault where the address is known. Other faults can set this bit to
0, such as a MemManage fault occurring later.
If a BusFault occurs and is escalated to a hard fault because of priority, the hard fault handler must set this
bit to 0. This prevents problems if returning to a stacked active BusFault handler whose BFAR value has
been overwritten.
[6] - Reserved.
[5]
LSPERR
a
0 = no bus fault occurred during floating-point lazy state preservation
1 = a bus fault occurred during floating-point lazy state preservation.
[4] STKERR BusFault on stacking for exception entry:
0 = no stacking fault
1 = stacking for an exception entry has caused one or more BusFaults.
When the processor sets this bit to 1, the SP is still adjusted but the values in the context area on the stack
might be incorrect. The processor does not write a fault address to the BFAR.
[3] UNSTKERR BusFault on unstacking for a return from exception:
0 = no unstacking fault
1 = unstack for an exception return has caused one or more BusFaults.
This fault is chained to the handler. This means that when the processor sets this bit to 1, the original return
stack is still present. The processor does not adjust the SP from the failing return, does not performed a
new save, and does not write a fault address to the BFAR.

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