ARM Cortex-M4 - Packing and Unpacking Instructions

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-107
ID121610 Non-Confidential
3.8 Packing and unpacking instructions
Table 3-11shows the instructions that operate on packing and unpacking data:
Table 3-11 Packing and unpacking instructions
Mnemonic Brief description See
PKH Pack Halfword PKHBT and PKHTB on page 3-108
SXTAB Extend 8 bits to 32 and add SXTA and UXTA on page 3-112
SXTAB16 Dual extend 8 bits to 16 and add SXTA and UXTA on page 3-112
SXTAH Extend 16 bits to 32 and add SXTA and UXTA on page 3-112
SXTB Sign extend a byte SXT and UXT on page 3-117
SXTB16 Dual extend 8 bits to 16 and add SXT and UXT on page 3-117
SXTH Sign extend a halfword SXT and UXT on page 3-117
UXTAB Extend 8 bits to 32 and add SXTA and UXTA on page 3-112
UXTAB16 Dual extend 8 bits to 16 and add SXTA and UXTA on page 3-112
UXTAH Extend 16 bits to 32 and add SXTA and UXTA on page 3-112
UXTB Zero extend a byte SXT and UXT on page 3-117
UXTB16 Dual zero extend 8 bits to 16 and add SXT and UXT on page 3-117
UXTH Zero extend a halfword SXT and UXT on page 3-117