The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-9
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3.2 CMSIS functions
ISO/IEC C code cannot directly access some Cortex-M4 instructions. This section describes
intrinsic functions that can generate these instructions, provided by the CMSIS and that might
be provided by a C compiler. If a C compiler does not support an appropriate intrinsic function,
you might have to use inline assembler to access some instructions.
The CMSIS provides the following intrinsic functions to generate instructions that ISO/IEC C
code cannot directly access:
The CMSIS also provides a number of functions for accessing the special registers using
MRS
and
MSR
instructions:
Table 3-2 CMSIS functions to generate some Cortex-M4 instructions
Instruction CMSIS function
CPSIE I void __enable_irq(void)
CPSID I void __disable_irq(void)
CPSIE F void __enable_fault_irq(void)
CPSID F void __disable_fault_irq(void)
ISB void __ISB(void)
DSB void __DSB(void)
DMB void __DMB(void)
REV uint32_t __REV(uint32_t int value)
REV16 uint32_t __REV16(uint32_t int value)
REVSH uint32_t __REVSH(uint32_t int value)
RBIT uint32_t __RBIT(uint32_t int value)
SEV void __SEV(void)
WFE void __WFE(void)
WFI void __WFI(void)
Table 3-3 CMSIS functions to access the special registers
Special register Access CMSIS function
PRIMASK Read
uint32_t __get_PRIMASK (void)
Write
void __set_PRIMASK (uint32_t value)
FAULTMASK Read
uint32_t __get_FAULTMASK (void)
Write
void __set_FAULTMASK (uint32_t value)
BASEPRI Read
uint32_t __get_BASEPRI (void)
Write
void __set_BASEPRI (uint32_t value)
CONTROL Read
uint32_t __get_CONTROL (void)
Write
void __set_CONTROL (uint32_t value)