ARM Cortex-M4 - Vcvtb, Vcvtt

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-133
ID121610 Non-Confidential
3.11.6 VCVTB, VCVTT
Converts between a half-precision value and a single-precision value.
Syntax
VCVT{y}{cond}.F32.F16 Sd, Sm
VCVT{y}{cond}.F16.F32 Sd, Sm
where:
y Specifies which half of the operand register Sm or destination register Sd is used
for the operand or destination:
• If y is
B , then the bottom half, bits [15:0], of Sm or Sd is used.
•If
y is T , then the top half, bits [31:16], of Sm or Sd is used.
cond Is an optional condition code, see Conditional execution on page 3-18.
Sd Specifies the destination register.
Sm Specifies the operand register.
Operation
This instruction with the
.F16.32 suffix:
1. Converts the half-precision value in the top or bottom half of a single-precision. register
to single-precision.
2. Writes the result to a single-precision register.
This instruction with the
.F32.F16 suffix:
1. Converts the value in a single-precision register to half-precision.
2. Writes the result into the top or bottom half of a single-precision register, preserving the
other half of the target register.
Restrictions
There are no restrictions.
Condition flags
These instructions do not change the flags.