The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-127
ID121610 Non-Confidential
VMOV
Copies between ARM core register to scalar VMOV ARM Core register to scalar on page 3-145
VMOV
Copies between Scalar to ARM core register VMOV Scalar to ARM Core register on page 3-142
VMRS
Move to ARM core register from floating-point System
Register
VMRS on page 3-146
VMSR
Move to floating-point System Register from ARM Core
register
VMSR on page 3-147
VMUL
Multiply floating-point VMUL on page 3-148
VNEG
Floating-point negate VNEG on page 3-149
VNMLA
Floating-point multiply and add VNMLA, VNMLS, VNMUL on page 3-150
VNMLS
Floating-point multiply and subtract VNMLA, VNMLS, VNMUL on page 3-150
VNMUL
Floating-point multiply VNMLA, VNMLS, VNMUL on page 3-150
VPOP
Pop extension registers VPOP on page 3-151
VPUSH
Push extension registers VPUSH on page 3-152
VSQRT
Floating-point square root VSQRT on page 3-153
VSTM
Store Multiple extension registers VSTM on page 3-154
VSTR
Stores an extension register to memory VSTR on page 3-155
VSUB
Floating-point Subtract VSUB on page 3-156
Table 3-15 Floating-point instructions (continued)
Mnemonic Brief description See