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Chapter 4 Cortex-M4 Peripherals
4.1 About the Cortex-M4 peripherals ............................................................................. 4-2
4.2 Nested Vectored Interrupt Controller ....................................................................... 4-3
4.3 System control block .............................................................................................. 4-11
4.4 System timer, SysTick ........................................................................................... 4-33
4.5 Optional Memory Protection Unit ........................................................................... 4-37
4.6 Floating Point Unit (FPU) ....................................................................................... 4-48
Appendix A Cortex-M4 Options
A.1 Cortex-M4 implementation options .......................................................................... A-2
Glossary