The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-33
ID121610 Non-Confidential
The
PUSH
and
POP
instructions can be expressed in this form. See PUSH and POP on page 3-34
for details.
Restrictions
In these instructions:
•
Rn
must not be PC
•
reglist
must not contain SP
• in any
STM
instruction,
reglist
must not contain PC
• in any
LDM
instruction,
reglist
must not contain PC if it contains LR
•
reglist
must not contain
Rn
if you specify the writeback suffix.
When PC is in
reglist
in an
LDM
instruction:
• bit[0] of the value loaded to the PC must be 1 for correct execution, and a branch occurs
to this halfword-aligned address
• if the instruction is conditional, it must be the last instruction in the IT block.
Condition flags
These instructions do not change the flags.
Examples
LDM R8,{R0,R2,R9} ; LDMIA is a synonym for LDM
STMDB R1!,{R3-R6,R11,R12}
Incorrect examples
STM R5!,{R5,R4,R9} ; Value stored for R5 is unpredictable
LDM R2, {} ; There must be at least one register in the list.
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