The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-47
ID121610 Non-Confidential
Operation
ASR
,
LSL
,
LSR
, and
ROR
move the bits in the register
Rm
to the left or right by the number of places
specified by constant
n
or register
Rs
.
RRX
moves the bits in register
Rm
to the right by 1.
In all these instructions, the result is written to
Rd
, but the value in register
Rm
remains
unchanged. For details on what result is generated by the different instructions, see Shift
Operations on page 3-13.
Restrictions
Do not use SP and do not use PC.
Condition flags
If
S
is specified:
• these instructions update the N and Z flags according to the result
• the C flag is updated to the last bit shifted out, except when the shift length is 0, see Shift
Operations on page 3-13.
Examples
ASR R7, R8, #9 ; Arithmetic shift right by 9 bits
LSLS R1, R2, #3 ; Logical shift left by 3 bits with flag update
LSR R4, R5, #6 ; Logical shift right by 6 bits
ROR R4, R5, R6 ; Rotate right by the value in the bottom byte of R6
RRX R4, R5 ; Rotate right with extend.
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