COBHAM GR712RC User Manual

GR712RC-UM, Jun 2017, Version 2.9 19 www.cobham.com/gaisler
GR712RC
2.6 2015-11-19 21.1, 21.4
7.2
12.3
13.2
16.9
8.3.7, 8.3.9
11.3
5.4
26.1, 26.6
15.7.3
16.9
1.7.12
23.1
MIL-STD-1553B, specify AHB slave interface and update
graphics
AHB Status Register needs NE bit to be cleared for error
monitoring
GRTIMER register interface overhauled and reset values
corrected
GPREG register typo for 1553DIVH
Spacewire Register address space correction
IRQMP register figure captions
GPTIMER register fix for CTRL.IP bit
Anticipated ramsn signal in Figure 25, which was one clock late
Clarify that there is no hardware link between GRTC and GRTM
UART FA field read-only and read-value specified
Added condition to bits TI and RI of DMA control register
Technical Note on GRETH Ethernet Controller
SPI controller does not support periodic transfers
2.5 2015-04-27 1.7.11
1.6
1.2, 5.1, 5.2,
5.4, 5.8.1,
5.14.1, 5.14.2
3, 3.4, 13.2
3.8
11.3
12.2, 12.3
8.3.5
4.8
16.1
9.4
13.2
4.7
6.3
Technical Note on LEON SRMMU Behaviour
Updated DS and MMU References
Corrected the max SRAM and PROM bank sizes and the maxi-
mum supported SRAM and PROM size
Telemetry clock input name inconsistency
SDCLK always driven by Delay line output
Refactored GPTIMER register description with error fixes
GRTIMER number of timers and scaler bits corrected
Document BA bit in Multiprocessor Status Register
Single Error Correction/Double Error Detection
SpaceWire documentation references update
Removed incorrect statements about multiply, divide and FPU
operations
Specify SDCLK delay value meaning and fix TMCLKI name
FPU trap queue has 8 entries
Corrected Table 36 layout with MEMSIZE MSb
2.4 2014-09-04 1.7.9
1.7.10
Added “
Failing SDRAM Access After Uncorrectable
EDAC Error” errata
Added “MIL-STD-1553B core duplicate interrupt asser-
tion” errata
TABLE 4. Revision history
Issue Date Sections Description

COBHAM GR712RC Specifications

General

Brand	COBHAM
Model	GR712RC
Category	Computer Hardware
Language	English