Freescale Semiconductor FlexRay MFR4310 - Figure 3-31. Sync Frame ID Rejection Filter Register (SFIDRFR); Table 3-39. SFIDRFR Field Descriptions

FlexRay Module (FLEXRAYV4)
MFR4310 Reference Manual, Rev. 2
102 Freescale Semiconductor
3.3.2.32 Sync Frame ID Rejection Filter Register (SFIDRFR)
This register defines the Sync Frame Rejection Filter ID. The application must update this register outside
of the static segment. If the application updates this register in the static segment, it can appear that the
FlexRay module accepts the sync frame in the current cycle.
2
OPT
One Pair Trigger — This trigger bit controls whether the FlexRay module writes continuously or only one pair
of Sync Frame Tables into the FRM.
If this trigger is set to 1 while SDVEN or SIDEN is set to 1, the FlexRay module writes only one pair of the
enabled Sync Frame Tables corresponding to the next even-odd-cycle pair into the FRM. In this case, the
FlexRay module clears the SDVEN or SIDEN bits immediately.
If this trigger is set to 0 while SDVEN or SIDEN is set to 1, the FlexRay module writes continuously the
enabled Sync Frame Tables into the FRM.
0 Write continuously pairs of enabled Sync Frame Tables into FlexRay memory.
1 Write only one pair of enabled Sync Frame Tables into FlexRay memory.
1
SDVEN
Sync Frame Deviation Table Enable — This bit controls the generation of the Sync Frame Deviation Tables.
The application must set this bit to request the FlexRay module to write the Sync Frame Deviation Tables into
the FRM.
0 Do not write Sync Frame Deviation Tables
1 Write Sync Frame Deviation Tables into FRM
Note: If SDVEN is set to 1, then SIDEN must also be set to 1.
0
SIDEN
Sync Frame ID Table Enable — This bit controls the generation of the Sync Frame ID Tables. The
application must set this bit to 1 to request the FlexRay module to write the Sync Frame ID Tables into the
FRM.
0 Do not write Sync Frame ID Tables
1 Write Sync Frame ID Tables into FRM
0x0046 16-bit write access required Write: Normal Mode
1514131211109876543210
R000000
SYNFRID
W
Reset0000000000000000
Figure 3-31. Sync Frame ID Rejection Filter Register (SFIDRFR)
Table 3-39. SFIDRFR Field Descriptions
Field Description
9–0
SYNFRID
Sync Frame Rejection ID — This field defines the frame ID of a frame that must not be used for clock
synchronization. For details see Section 3.4.15.2, “Sync Frame Rejection Filtering”.
Table 3-38. SFTCCSR Field Descriptions (Continued)
Field Description