Freescale Semiconductor FlexRay MFR4310 - Memory Map and Register Description; Memory Map; Table 3-3. Flexray Memory Map

FlexRay Module (FLEXRAYV4)
MFR4310 Reference Manual, Rev. 2
Freescale Semiconductor 65
3.2.1.5 RXD_BG2 — Receive Data Channel B
The RXD_BG2 signal carries the receive data for channel B from the corresponding FlexRay bus driver.
3.2.1.6 TXD_BG2 — Transmit Data Channel B
The TXD_BG2 signal carries the transmit data for channel B to the corresponding FlexRay bus driver
3.2.1.7 TXEN2# — Transmit Enable Channel B
The TXEN2# signal indicates to the FlexRay bus driver that the FlexRay module is attempting to transmit
data on channel B.
3.2.1.8 DBG3, DBG2, DBG1, DBG0 — Strobe Signals
These signals provide the selected debug strobe signals. For details on the debug strobe signal selection
refer to Section 3.4.16, “Strobe Signal Support”.
3.3 Memory Map and Register Description
The FlexRay module occupies 1280 bytes of address space starting at address 0x0000.
3.3.1 Memory Map
The complete memory map of the FlexRay module is shown in Table 3-3.
Table 3-3. FlexRay Memory Map
Address Register Access
Module Configuration and Control
0x0000 Module Version Register (MVR) R
0x0002 Module Configuration Register (MCR) R/W
0x0004 Reserved R
0x0006 Reserved R
0x0008 Strobe Signal Control Register (STBSCR) R/W
0x000A Reserved R/W
0x000C Message Buffer Data Size Register (MBDSR) R/W
0x000E Message Buffer Segment Size and Utilization Register (MBSSUTR) R/W
Test Registers
0x0010 Reserved R
0x0012 Reserved R
Interrupt and Error Handling
0x0014 Protocol Operation Control Register (POCR) R/W
0x0016 Global Interrupt Flag and Enable Register (GIFER) R/W
0x0018 Protocol Interrupt Flag Register 0 (PIFR0) R/W
0x001A Protocol Interrupt Flag Register 1 (PIFR1) R/W
0x001C Protocol Interrupt Enable Register 0 (PIER0) R/W