Freescale Semiconductor FlexRay MFR4310 - Figure 3-11. Protocol Interrupt Enable Register 0 (PIER0); Table 3-19. PIER0 Field Descriptions

FlexRay Module (FLEXRAYV4)
MFR4310 Reference Manual, Rev. 2
84 Freescale Semiconductor
3.3.2.12 Protocol Interrupt Enable Register 0 (PIER0)
This register defines whether or not the individual interrupt flags defined in the Protocol Interrupt Flag
Register 0 (PIFR0) can generate a protocol interrupt request.
0x001C Write: Any Time
1514131211109876543210
R
FATL_IE
INTL_IE ILCF_IE
CSA_IE
MRC_IE
MOC_IE
CCL_IE
MXS_IE
MTX_IE
LTXB_IE LTXA_IE
TBVB_IE
TBVA_IE
TI2_IE TI1_IE
CYS_IE
W
Reset0000000000000000
Figure 3-11. Protocol Interrupt Enable Register 0 (PIER0)
Table 3-19. PIER0 Field Descriptions
Field Description
15
FATL_IE
Fatal Protocol Error Interrupt Enable — This bit controls FATL_IF interrupt request generation.
0 interrupt request generation disabled
1 interrupt request generation enabled
14
INTL_IE
Internal Protocol Error Interrupt Enable — This bit controls INTL_IF interrupt request generation.
0 interrupt request generation disabled
1 interrupt request generation enabled
13
ILCF_IE
Illegal Protocol Configuration Interrupt Enable — This bit controls ILCF_IF interrupt request generation.
0 interrupt request generation disabled
1 interrupt request generation enabled
12
CSA_IE
Cold Start Abort Interrupt Enable — This bit controls CSA_IF interrupt request generation.
0 interrupt request generation disabled
1 interrupt request generation enabled
11
MRC_IE
Missing Rate Correction Interrupt Enable — This bit controls MRC_IF interrupt request generation.
0 interrupt request generation disabled
1 interrupt request generation enabled
10
MOC_IE
Missing Offset Correction Interrupt Enable — This bit controls MOC_IF interrupt request generation.
0 interrupt request generation disabled
1 interrupt request generation enabled
9
CCL_IE
Clock Correction Limit Reached Interrupt Enable — This bit controls CCL_IF interrupt request generation.
0 interrupt request generation disabled
1 interrupt request generation enabled
8
MXS_IE
Max Sync Frames Detected Interrupt Enable — This bit controls MXS_IF interrupt request generation.
0 interrupt request generation disabled
1 interrupt request generation enabled
7
MTX_IE
Media Access Test Symbol Received Interrupt Enable — This bit controls MTX_IF interrupt request
generation.
0 interrupt request generation disabled
1 interrupt request generation enabled
6
LTXB_IE
pLatestTx Violation on Channel B Interrupt Enable — This bit controls LTXB_IF interrupt request generation.
0 interrupt request generation disabled
1 interrupt request generation enabled
5
LTXA_IE
pLatestTx Violation on Channel A Interrupt Enable — This bit controls LTXA_IF interrupt request generation.
0 interrupt request generation disabled
1 interrupt request generation enabled