Freescale Semiconductor FlexRay MFR4310 - Figure 3-36. Timer Configuration and Control Register (TICCR); Table 3-45. TICCR Field Descriptions

FlexRay Module (FLEXRAYV4)
MFR4310 Reference Manual, Rev. 2
Freescale Semiconductor 105
3.3.2.37 Timer Configuration and Control Register (TICCR)
This register is used to configure and control the two timers, T1 and T2. For timer details, see
Section 3.4.17, “Timer Support”. Timer T1 is an absolute timer. Timer T2 can be configured as an absolute
or relative timer.
NOTE
Both timers are deactivated immediately when the protocol enters a state
different from POC:normal active or POC:normal passive.
0x005A Write: T2_CFG: POC:config
T2_REP, T1_REP, T1SP, T2SP, T1TR, T2TR: Normal Mode
1514131211109876543210
R0 0
T2_CFG
T2_REP
000T2ST000
T1_REP
000T1ST
W
T2SP T2TR T1SP T1TR
Reset0000000000000000
Figure 3-36. Timer Configuration and Control Register (TICCR)
Table 3-45. TICCR Field Descriptions
Field Description
13
T2_CFG
Timer T2 Configuration — This bit configures the timebase mode of Timer T2.
0 T2 is absolute timer.
1 T2 is relative timer.
12
T2_REP
Timer T2 Repetitive Mode — This bit configures the repetition mode of Timer T2.
0 T2 is non repetitive
1 T2 is repetitive
10
T2SP
Timer T2 Stop — This trigger bit is used to stop timer T2.
0 no effect
1 stop timer T2
9
T2TR
Timer T2 Trigger — This trigger bit is used to start timer T2.
0 no effect
1 start timer T2
8
T2ST
Timer T2 State — This status bit provides the current state of timer T2.
0 timer T2 is idle
1 timer T2 is running
4
T1_REP
Timer T1 Repetitive Mode — This bit configures the repetition mode of timer T1.
0 T1 is non repetitive
1 T1 is repetitive
2
T1SP
Timer T1 Stop — This trigger bit is used to stop timer T1.
0 no effect
1 stop timer T1
1
T1TR
Timer T1 Trigger — This trigger bit is used to start timer T1.
0 no effect
1 start timer T1
0
T1ST
Timer T1 State — This status bit provides the current state of timer T1.
0 timer T1 is idle
1 timer T1 is running