Freescale Semiconductor FlexRay MFR4310 - Chapter 4 Port Integration Module (PIM); External Signal Description; Introduction; Overview

MFR4310 Reference Manual, Rev. 2
Freescale Semiconductor 207
Chapter 4
Port Integration Module (PIM)
4.1 Introduction
4.1.1 Overview
The Port Integration Module implements the interfaces between the FlexRay IP block, the peripheral
modules, and the I/O pins.
4.1.2 Features
The Port Integration Module includes these distinctive features:
• Pad control for all functional pads including:
— drive strength enable (DSE), via a control register
— pull enable (PUE), via a control register
— pull select (PUS), via a control register
• Pin multiplexing and direction control for reset mode
4.1.3 Modes of Operation
The Port Integration Module can be put into the following modes:
• Functional Mode
In this mode, the module drives each associated pin and has complete control of the direction of
that pin. The drive strength and pullup/pulldown enable are controlled via a set of control registers.
• Reset Mode
In this mode, the pin configuration is changed for:
— clock output control: CLK_S0 and CLK_S1
— host interface control: IF_SEL0 and IF_SEL1
The control signals become available on the corresponding pins in reset mode. Refer to Chapter 6,
“Clocks and Reset Generator (CRG)” for reset mode details.
This is a high level description only; detailed descriptions of operating modes are contained in later
sections.
4.2 External Signal Description
For detailed descriptions of particular pins and signals, refer to Section 2.4, “Signal Descriptions”.