Freescale Semiconductor FlexRay MFR4310 - Reset Mode; Table 4-10. Reset Mode Interface

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Port Integration Module (PIM)

MFR4310 Reference Manual, Rev. 2

216 Freescale Semiconductor

The module provides pullup/pulldown and drive strength control through configuration registers via the

IPBus interface. The actual control registers are described in Section 4.3, “PIM Memory Map and

Registers”.

4.4.2 Reset Mode

In reset mode, the Port Integration Module provides access to four configuration pins for clock output

control in the CRG and external bus interface (EBI) control in the FlexRay IP block. In this case the

corresponding pins are forced to input mode with pull enabled.

See Section 4.2.2, “Reset Mode” and Chapter 6, “Clocks and Reset Generator (CRG)” for reset mode

details.

Table 4-10. Reset Mode Interface

Name Direction Special Configuration

TXD_BG2/IF_SEL0 Input PU

TXD_BG1/IF_SEL1 Input PD

DBG[3:2]/CLK_S[1:0] Input PD