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Freescale Semiconductor FlexRay MFR4310 - Chapter 1 Device Overview; Features; Introduction

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MFR4310 Reference Manual, Rev. 2
Freescale Semiconductor 29
Chapter 2
Device Overview
2.1 Introduction
The MFR4310 FlexRay Communication Controller implements the FlexRay protocol according to the
FlexRay Communications System Protocol Specification V2.1A.
The controller host interface (CHI) of the MFR4310 FlexRay Communication Controller is implemented
in accordance with Chapter 3, “FlexRay Module (FLEXRAYV4)” of this reference manual.
2.2 Features
The MFR4310 FlexRay controller provides the following features:
Single channel support
Internal channel A and FlexRay Port A can be configured to be connected to physical FlexRay
channel A or physical FlexRay channel B
Variable bit rate support: 2.5, 5, 8, or 10 Mb/s
128 configurable message buffers with
Individual frame ID filtering
Individual channel ID filtering
Individual cycle counter filtering
Message buffer header, status and payload data are stored in FlexRay memory
Consistent data access ensured by means of buffer locking scheme
Host can lock multiple buffers at the same time
Size of message buffer data section configurable from 0 up to 254 bytes
Two independent message buffer segments with configurable size of payload data section
Each segment can contain message buffers assigned to the static segment and message buffers
assigned to the dynamic segment at the same time
Zero padding for transmit message buffers in static segment
Applied when the frame payload length exceeds the size of the message buffer data section
Transmit message buffers configurable with state/event semantics
Message buffers can be configured as
Receive message buffers
Single buffered transmit message buffer
Double buffered transmit message buffer (combines two single buffered message buffer)
Individual message buffer reconfiguration supported
Means provided to safely disable individual message buffers
Disabled message buffers can be reconfigured

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