Freescale Semiconductor FlexRay MFR4310 - Figure 3-61. Protocol Configuration Register 0 (PCR0); Figure 3-62. Protocol Configuration Register 1 (PCR1); Figure 3-63. Protocol Configuration Register 2 (PCR2); Table 3-74. Wakeup Channel Selection

FlexRay Module (FLEXRAYV4)
MFR4310 Reference Manual, Rev. 2
Freescale Semiconductor 123
3.3.2.62.1 Protocol Configuration Register 0 (PCR0)
3.3.2.62.2 Protocol Configuration Register 1 (PCR1)
3.3.2.62.3 Protocol Configuration Register 2 (PCR2)
decoding_correction_b pDecodingCorrection +
pDelayCompensation[B] + 2
μT7
key_slot_header_crc header CRC for key slot 0x000 0x7FF number 12
extern_offset_correction pExternOffsetCorrection
μT29
extern_rate_correction pExternRateCorrection
μT21
1
See FlexRay Communications System Protocol Specification, Version 2.1 Rev A for detailed protocol parameter definitions
Table 3-74. Wakeup Channel Selection
wakeup_channel Wakeup Channel
0A
1B
0x00A0 Write: POC:config
1514131211109876543210
R
action_point_offset static_slot_length
W
Reset0000000000000000
Figure 3-61. Protocol Configuration Register 0 (PCR0)
0x00A2 Write: POC:config
1514131211109876543210
R0 0
macro_after_first_static_slot
W
Reset0000000000000000
Figure 3-62. Protocol Configuration Register 1 (PCR1)
0x00A4 Write: POC:config
1514131211109876543210
R
minislot_after_action_point number_of_static_slots
W
Reset0000000000000000
Figure 3-63. Protocol Configuration Register 2 (PCR2)
Table 3-73. Protocol Configuration Register Fields (Continued)
Name Description
1
Min Max Unit PCR