Freescale Semiconductor FlexRay MFR4310 - Figure 3-50. Receive FIFO Depth and Size Register (RFDSR); Figure 3-51. Receive FIFO a Read Index Register (RFARIR); Table 3-62. RFDSR Field Descriptions; Table 3-63. RFARIR Field Descriptions

FlexRay Module (FLEXRAYV4)
MFR4310 Reference Manual, Rev. 2
116 Freescale Semiconductor
3.3.2.51 Receive FIFO Depth and Size Register (RFDSR)
This register defines the structure of the selected FIFO, i.e. the number of entries and the size of each entry.
3.3.2.52 Receive FIFO A Read Index Register (RFARIR)
This register provides the message buffer header index of the next available receive FIFO A entry that the
application can read.
NOTE
If the receive FIFO not empty flag FNEAIF is not set, the RDIDX field
points to a physical message buffer that contains invalid data. Only when
FNEAIF is set, does the message buffer indicated by RDIDX contain valid
data.
0x008A Write: POC:config
1514131211109876543210
R
FIFO_DEPTH
0
ENTRY_SIZE
W
Reset0000000000000000
Figure 3-50. Receive FIFO Depth and Size Register (RFDSR)
Table 3-62. RFDSR Field Descriptions
Field Description
15–8
FIFO_DEPTH
FIFO Depth — This field defines the depth of the selected receive FIFO, i.e. the number of entries.
6–0
ENTRY_SIZE
Entry Size — This field defines the size of the frame data sections for the selected receive FIFO in 2 byte
entities.
0x008C
1514131211109876543210
R00000000 RDIDX
W
Reset0000000000000000
Figure 3-51. Receive FIFO A Read Index Register (RFARIR)
Table 3-63. RFARIR Field Descriptions
Field Description
7–0
RDIDX
Read Index — This field provides the message buffer header index of the next available receive FIFO message
buffer that the application can read. The FlexRay module increments this index when the application writes to
the FNEAIF flag in the Global Interrupt Flag and Enable Register (GIFER). The index wraps back to the first
message buffer header index if the end of the FIFO was reached.