Freescale Semiconductor FlexRay MFR4310 - Page 66

FlexRay Module (FLEXRAYV4)
MFR4310 Reference Manual, Rev. 2
66 Freescale Semiconductor
0x001E Protocol Interrupt Enable Register 1 (PIER1) R/W
0x0020 CHI Error Flag Register (CHIERFR) R/W
0x0022 Message Buffer Interrupt Vector Register (MBIVEC) R
0x0024 Channel A Status Error Counter Register (CASERCR) R
0x0026 Channel B Status Error Counter Register (CBSERCR) R
Protocol Status
0x0028 Protocol Status Register 0 (PSR0) R
0x002A Protocol Status Register 1 (PSR1) R
0x002C Protocol Status Register 2 (PSR2) R
0x002E Protocol Status Register 3 (PSR3) R/W
0x0030 Macrotick Counter Register (MTCTR) R
0x0032 Cycle Counter Register (CYCTR) R
0x0034 Slot Counter Channel A Register (SLTCTAR) R
0x0036 Slot Counter Channel B Register (SLTCTBR) R
0x0038 Rate Correction Value Register (RTCORVR) R
0x003A Offset Correction Value Register (OFCORVR) R
0x003C Combined Interrupt Flag Register (CIFRR) R
0x003E Reserved R
Sync Frame Counter and Tables
0x0040 Sync Frame Counter Register (SFCNTR) R
0x0042 Sync Frame Table Offset Register (SFTOR) R/W
0x0044 Sync Frame Table Configuration, Control, Status Register (SFTCCSR) R/W
Sync Frame Filter
0x0046 Sync Frame ID Rejection Filter Register (SFIDRFR) R/W
0x0048 Sync Frame ID Acceptance Filter Value Register (SFIDAFVR) R/W
0x004A Sync Frame ID Acceptance Filter Mask Register (SFIDAFMR) R/W
Network Management Vector
0x004C Network Management Vector Register 0 (NMVR0) R
0x004E Network Management Vector Register 1 (NMVR1) R
0x0050 Network Management Vector Register 2 (NMVR2) R
0x0052 Network Management Vector Register 3 (NMVR3) R
0x0054 Network Management Vector Register 4 (NMVR4) R
0x0056 Network Management Vector Register 5 (NMVR5) R
0x0058 Network Management Vector Length Register (NMVLR) R/W
Timer Configuration
0x005A Timer Configuration and Control Register (TICCR)
R/W
0x005C Timer 1 Cycle Set Register (TI1CYSR) R/W
0x005E Timer 1 Macrotick Offset Register (TI1MTOR) R/W
0x0060 Timer 2 Configuration Register 0 (TI2CR0) R/W
0x0062 Timer 2 Configuration Register 1 (TI2CR1) R/W
Slot Status Configuration
Table 3-3. FlexRay Memory Map (Continued)
Address Register Access