Panasonic FP0R - Page 317

15-55
Num-
ber
Name Boolean
Ope-
rand
Description
Steps
FP0/FP-e
FP0R
FP
Σ
FP-X
FP2
FP2SH/FP10SH
F150
P150
Data read from
intelligent unit
READ
PREAD
S1, S2,
n, D
Reads the data from the
intelligent unit.
9
*3
F151
P151
Data write into
intelligent unit
WRT
PWRT
S1, S2,
n, D
Writes the data into the intelligent
unit.
9
*3
F152
P152
Data read from
MEWNET-F
slave station
RMRD
PRMRD
S1, S2,
n, D
Reads the data from the
intelligent unit at the MEWNET-F
(remote I/O) slave station.
9
F153
P153
Data write into
MEWNET-F
slave station
RMWT
PRMWT
S1, S2,
n, D
Writes the data into the intelligent
unit at the MEWNET-F (remote
I/O) slave station.
9
F155
P155
Sampling
SMPL
PSMPL
-
Starts sampling data.
1
*5
*4
F156
P156
Sampling
trigger
STRG
PSTRG
-
When the trigger of this
instruction turns on, the sampling
trace stops.
1
*5 *4
F157
P157
Time addition
CADD
PCADD
S1, S2,
D
The time after (S2+1, S2)
elapses from the time of (S1+2,
S1+1, S1) is stored in (D+2, D+1,
D).
9
*1
F158
P158
Time
subtraction
CSUB
PCSUB
S1, S2,
D
The time that results from
subtracting (S2+1, S2) from the
time (S1+2, S1+1, S1) is stored
in (D+2, D+1, D).
9
*1
F159
P159
Serial port
communication
MTRN
PMTRN
S, n, D
This is used to send data to an
external device through the
specified CPU COM port or MCU
COM port.
7
*2
*2
F161
P161
MCU serial port
reception
MRCV
PMRCV
S, D1,
D2
Data is received from external
equipment via the COM port of
the specified MCU.
7
*2
*2
BIN arithmetic instruction
F160
P160
Double word
(32-bit) data
square root
DSQR
PDSQR
S, D
√(S)→(D) 7
High speed counter/Pulse output instruction for FP0, FP-e
F0
High-speed
counter and
Pulse output
controls
MV
S,
DT9052
Performs high-speed counter and
Pulse output controls according
to the control code specified by
“S”. The control code is stored in
DT9052.
5
1
Change and
read of the
elapsed value
of high-speed
counter and
Pulse output
DMV
S,
DT9044
Transfers (S+1, S) to high-speed
counter and Pulse output elapsed
value area.
7
DT9044,
D
Transfers value in high-speed
counter and Pulse output elapsed
value area to (D+1, D).
7
F166
High-speed
counter output
set (with
channel
specification)
HC1S
n, S, Yn
Turns output Yn on when the
elapsed value of the built-in high-
speed counter reaches the target
value of (S+1, S).
11
: Available, : Not available, : Not available partially
*1) The instruction is available for FP0 T32 (V2.3 or later) and FP-e.
*2) The instruction is available for FP2/FP2SH Ver. 1.5 or later, and the pulse execution type can be specified.
FP10SH cannot be used.
*3) This instruction is available for FPΣ Ver. 2.0 or later.
*4) This instruction is only available for FP-X Ver.2.0 or later.
*5) This instruction is available for FPΣ Ver. 3.10 or later.