ST STM32F101 series Reference Manual

DocID13902 Rev 15 1120/1128
RM0008 Revision history
1120
02-Jun-
2014
15
(continued)
BxCAN:
Added register access in Section 24.9: CAN registers.
Updated Figure 222: Dual CAN block diagram (connectivity devices).
Updated definition of CAN2SB bits in Section : CAN filter master register (CAN_FMR).
I2C:
Modified Section 26.3.7: DMA requests.
Updated definition of PE and note related to SWRST bit, moved note related to STOP bit
to the whole register in Section 26.6.1: I2C Control register 1 (I2C_CR1).
Updated bit 14 description in Section 26.6.3: I2C Own address register 1 (I2C_OAR1).
USART:
Introduced Sm (standard mode) and Fm (fast mode) acronyms.
Updated info about the frequency in Section 27.1: USART introduction .
Updated Section 27.3.11: Smartcard.
Updated CTSE bitfield description in Section 27.6.6: Control register 3 (USART_CR3).
ETHERNET
Updated TBAP2 bit description in Section ·: TDES3: Transmit descriptor Word3.
Table 235. Document revision history (continued)
Date Revision Changes

ST STM32F101 series Specifications

General

Brand	ST
Model	STM32F101 series
Category	Computer Hardware
Language	English