ST STM32F101 series Reference Manual

Inter-integrated circuit (I
2
C) interface RM0008
777/1128 DocID13902 Rev 15
26.6.10 I
2
C register map
The table below provides the I
2
C register map and reset values.
Refer to Table 3 on page 51 for the register boundary addresses table.
Table 190. I
2
C register map and reset values
Offset Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12
11
10
9 8 7 6 5 4 3 2 1 0
0x00
I2C_CR1
Reserved
SWRST
Reserved
ALERT
PEC
POS
ACK
STOP
START
NOSTRETCH
ENGC
ENPEC ENARP
SMBTYPE
Reserved
SMBUS
PE
Reset value 0 0000 0 0 00000 00
0x04
I2C_CR2
Reserved
LAST
DMAEN
ITBUFEN
ITEVTEN
ITERREN
Reserved
FREQ[5:0]
Reset value 000 0 0 000000
0x08
I2C_OAR1
Reserved
ADDMODE
Reserved
ADD[9:8] ADD[7:1]
ADD0
Reset value 0 0 0 00000000
0x0C
I2C_OAR2
Reserved
ADD2[7:1]
ENDUAL
Reset value 00000000
0x10
I2C_DR
Reserved
DR[7:0]
Reset value 00000000
0x14
I2C_SR1
Reserved
SMBALERT
TIMEOUT
Reserved
PECERR
OVR
AF
ARLO
BERR
TxE
RxNE
Reserved
STOPF
ADD10
BTF
ADDR
SB
Reset value 00 000 0 0 00 00000
0x18
I2C_SR2
Reserved
PEC[7:0]
DUALF
SMBHOST
SMBDEFAULT
GENCALL
Reserved
TRA
BUSY
MSL
Reset value 000 000 0 0 0000 000
0x1C
I2C_CCR
Reserved
F/S
DUTY
Reserved
CCR[11:0]
Reset value 00 00 0 0 00000000
0x20
I2C_TRISE
Reserved
TRISE[5:0]
Reset value 000010

ST STM32F101 series Specifications

General

Brand	ST
Model	STM32F101 series
Category	Computer Hardware
Language	English