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ST STM32F101 series Reference Manual

ST STM32F101 series
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DocID13902 Rev 15 206/1128
RM0008 Interrupts and events
213
10.2.1 Main features
The EXTI controller main features are the following:
Independent trigger and mask on each interrupt/event line
Dedicated status bit for each interrupt line
Generation of up to 20 software event/interrupt requests
Detection of external signal with pulse width lower than APB2 clock period. Refer to the
electrical characteristics section of the datasheet for details on this parameter.
10.2.2 Block diagram
The block diagram is shown in Figure 20.
Figure 20. External interrupt/event controller block diagram
10.2.3 Wakeup event management
The STM32F10xxx is able to handle external or internal events in order to wake up the core
(WFE). The wakeup event can be generated either by:
enabling an interrupt in the peripheral control register but not in the NVIC, and enabling
the SEVONPEND bit in the Cortex
®
-M3 System Control register. When the MCU
TRIGGER
SELECTION
0ERIPHERALINTERFACE
%DGEDETECT
!-"!!0"BUS
0#,+

 

CIRCUIT
INTERRUPT

3OFTWARE
TRIGGER
SELECTION
2ISING &ALLING

(YHQW
PDVN
0ULSE
GENERATOR




)NPUT
,INE
REGISTER REGISTER
UHJLVWHU


EVENT
REGISTER
-36
0ENDING
REQUEST
REGISTER
)NTERRUPT
MASK
REGISTER
4O.6)#INTERRUPT
CONTROLLER

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ST STM32F101 series Specifications

General IconGeneral
BrandST
ModelSTM32F101 series
CategoryComputer Hardware
LanguageEnglish

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