Real-time clock (RTC) RM0008
483/1128 DocID13902 Rev 15
18.4.6 RTC alarm register high (RTC_ALRH / RTC_ALRL)
When the programmable counter reaches the 32-bit value stored in the RTC_ALR register,
an alarm is triggered and the RTC_alarmIT interrupt request is generated. This register is
write-protected by the RTOFF bit in the RTC_CR register, and a write operation is allowed if
the RTOFF value is ‘1’.
RTC alarm register high (RTC_ALRH)
Address offset: 0x20
Write only (see Section 18.3.4 on page 476)
Reset value: 0xFFFF
RTC alarm register low (RTC_ALRL)
Address offset: 0x24
Write only (see Section 18.3.4 on page 476)
Reset value: 0xFFFF
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RTC_ALR[31:16]
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Bits 15:0 RTC_ALR[31:16]: RTC alarm high
The high part of the alarm time is written by software in this register. To write to this register
it is necessary to enter configuration mode (see Section 18.3.4: Configuring RTC registers
on page 476).
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RTC_ALR[15:0]
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Bits 15:0 RTC_ALR[15:0]: RTC alarm low
The low part of the alarm time is written by software in this register. To write to this register it
is necessary to enter configuration mode (see Section 18.3.4: Configuring RTC registers on
page 476).
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