ST STM32F101 series Reference Manual

DocID13902 Rev 15 738/1128
RM0008 Serial peripheral interface (SPI)
742
25.5.5 SPI CRC polynomial register (SPI_CRCPR) (not used in I
2
S
mode)
Address offset: 0x10
Reset value: 0x0007
25.5.6 SPI RX CRC register (SPI_RXCRCR) (not used in I
2
S mode)
Address offset: 0x14
Reset value: 0x0000
25.5.7 SPI TX CRC register (SPI_TXCRCR) (not used in I
2
S mode)
Address offset: 0x18
Reset value: 0x0000
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CRCPOLY[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 15:0 CRCPOLY[15:0]: CRC polynomial register
This register contains the polynomial for the CRC calculation.
The CRC polynomial (0007h) is the reset value of this register. Another polynomial can be
configured as required.
Note: These bits are not used for the I
2
S mode.
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RXCRC[15:0]
rrrrrrrrrrrrrrrr
Bits 15:0 RXCRC[15:0]: Rx CRC register
When CRC calculation is enabled, the RxCRC[15:0] bits contain the computed CRC value of
the subsequently received bytes. This register is reset when the CRCEN bit in SPI_CR1
register is written to 1. The CRC is calculated serially using the polynomial programmed in
the SPI_CRCPR register.
Only the 8 LSB bits are considered when the data frame format is set to be 8-bit data (DFF
bit of SPI_CR1 is cleared). CRC calculation is done based on any CRC8 standard.
The entire 16-bits of this register are considered when a 16-bit data frame format is selected
(DFF bit of the SPI_CR1 register is set). CRC calculation is done based on any CRC16
standard.
Note: A read to this register when the BSY Flag is set could return an incorrect value.
Theser bits are not used for I
2
S mode.
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TXCRC[15:0]
rrrrrrrrrrrrrrrr

ST STM32F101 series Specifications

General

Brand	ST
Model	STM32F101 series
Category	Computer Hardware
Language	English