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Independent watchdog (IWDG) RM0008

489/1128 DocID13902 Rev 15

Reset value: 0x0000 0000 (not reset by Standby mode)

Note: If several reload values or prescaler values are used by application, it is mandatory to wait

until RVU bit is reset before changing the reload value and to wait until PVU bit is reset

before changing the prescaler value. However, after updating the prescaler and/or the

reload value it is not necessary to wait until RVU or PVU is reset before continuing code

execution (even in case of low-power mode entry, the write operation is taken into account

and will complete)

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Reserved

RVU PVU

Bits 31:2 Reserved, must be kept at reset value.

Bit 1 RVU: Watchdog counter reload value update

This bit is set by hardware to indicate that an update of the reload value is ongoing. It is reset

by hardware when the reload value update operation is completed in the V

voltage domain

(takes up to 5 RC 40 kHz cycles).

Reload value can be updated only when RVU bit is reset.

Bit 0 PVU: Watchdog prescaler value update

This bit is set by hardware to indicate that an update of the prescaler value is ongoing. It is

reset by hardware when the prescaler update operation is completed in the V

voltage

domain (takes up to 5 RC 40 kHz cycles).

Prescaler value can be updated only when PVU bit is reset.

ST STM32F101 series Reference Manual

Other manuals for ST STM32F101 series