ST STM32F101 series Reference Manual

USB on-the-go full-speed (OTG_FS) RM0008
889/1128 DocID13902 Rev 15
OTG_FS device V
BUS
pulsing time register (OTG_FS_DVBUSPULSE)
Address offset: 0x082C
Reset value: 0x0000 05B8
This register specifies the V
BUS
pulsing time during SRP.
OTG_FS device IN endpoint FIFO empty interrupt mask register:
(OTG_FS_DIEPEMPMSK)
Address offset: 0x834
Reset value: 0x0000 0000
This register is used to control the IN endpoint FIFO empty interrupt generation
(TXFE_OTG_FS_DIEPINTx).
313029282726252423222120191817161514131211109876543210
Reserved
DVBUSP
rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:12 Reserved, must be kept at reset value.
Bits 11:0 DVBUSP: Device V
BUS
pulsing time
Specifies the V
BUS
pulsing time during SRP. This value equals:
V
BUS
pulsing time in PHY clocks / 1 024
313029282726252423222120191817161514131211109876543210
Reserved
INEPTXFEM
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 INEPTXFEM: IN EP Tx FIFO empty interrupt mask bits
These bits act as mask bits for OTG_FS_DIEPINTx.
TXFE interrupt one bit per IN endpoint:
Bit 0 for IN endpoint 0, bit 3 for IN endpoint 3
0: Masked interrupt
1: Unmasked interrupt

ST STM32F101 series Specifications

General

Brand	ST
Model	STM32F101 series
Category	Computer Hardware
Language	English