Cortex-M4 Peripherals
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 4-12
ID121610 Non-Confidential
See the register summary in Table 4-12 on page 4-11 for the ACTLR attributes. The bit
assignments are:
About IT folding
In some situations, the processor can start executing the first instruction in an IT block while it
is still executing the
IT
instruction. This behavior is called IT folding, and improves
performance, However, IT folding can cause jitter in looping. If a task must avoid jitter, set the
DISFOLD bit to 1 before executing the task, to disable IT folding.
ReservedReserved
31 3210
DISFOLD
DISDEFWBUF
DISMCYCINT
10 9 8 7
DISFPCA
DISOOFP
Table 4-13 ACTLR bit assignments
Bits Name Function
[31:10] - Reserved.
[9]
DISOOFP
a
Disables floating point instructions completing out of order with respect to integer instructions.
[8]
DISFPCA
a
Disables automatic update of CONTROL.FPCA.
[7:3] - Reserved.
[2] DISFOLD When set to 1, disables IT folding. see About IT folding for more information.
[1] DISDEFWBUF When set to 1, disables write buffer use during default memory map accesses. This causes all
BusFaults to be precise BusFaults but decreases performance because any store to memory must
complete before the processor can execute the next instruction.
This bit only affects write buffers implemented in the Cortex-M4 processor.
[0] DISMCYCINT When set to 1, disables interruption of load multiple and store multiple instructions. This increases
the interrupt latency of the processor because any LDM or STM must complete before the
processor can stack the current state and enter the interrupt handler.
a. Only implemented in a Cortex-M4F device
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