ARM Cortex-M4 - Page 50

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-3
ID121610 Non-Confidential
DMB - Data Memory Barrier - page 3-160
DSB - Data Synchronization Barrier - page 3-161
EOR, EORS {Rd,} Rn, Op2 Exclusive OR N,Z,C page 3-44
ISB - Instruction Synchronization Barrier - page 3-162
IT - If-Then condition block - page 3-122
LDM Rn{!}, reglist Load Multiple registers, increment after - page 3-32
LDMDB, LDMEA Rn{!}, reglist Load Multiple registers, decrement before - page 3-32
LDMFD, LDMIA Rn{!}, reglist Load Multiple registers, increment after - page 3-32
LDR Rt, [Rn, #offset] Load Register with word - page 3-22
LDRB, LDRBT Rt, [Rn, #offset] Load Register with byte - page 3-22
LDRD Rt, Rt2, [Rn, #offset] Load Register with two bytes - page 3-24
LDREX Rt, [Rn, #offset] Load Register Exclusive - page 3-36
LDREXB Rt, [Rn] Load Register Exclusive with Byte - page 3-36
LDREXH Rt, [Rn] Load Register Exclusive with Halfword - page 3-36
LDRH, LDRHT Rt, [Rn, #offset] Load Register with Halfword - page 3-22
LDRSB, LDRSBT Rt, [Rn, #offset] Load Register with Signed Byte - page 3-22
LDRSH, LDRSHT Rt, [Rn, #offset] Load Register with Signed Halfword - page 3-22
LDRT Rt, [Rn, #offset] Load Register with word - page 3-22
LSL, LSLS Rd, Rm, <Rs|#n> Logical Shift Left N,Z,C page 3-46
LSR, LSRS Rd, Rm, <Rs|#n> Logical Shift Right N,Z,C page 3-46
MLA Rd, Rn, Rm, Ra Multiply with Accumulate, 32-bit result - page 3-75
MLS Rd, Rn, Rm, Ra Multiply and Subtract, 32-bit result - page 3-75
MOV, MOVS Rd, Op2 Move N,Z,C page 3-50
MOVT Rd, #imm16 Move Top - page 3-52
MOVW, MOV Rd, #imm16 Move 16-bit constant N,Z,C page 3-50
MRS Rd, spec_reg Move from Special Register to general register - page 3-163
MSR spec_reg, Rm Move from general register to Special Register N,Z,C,V page 3-164
MUL, MULS {Rd,} Rn, Rm Multiply, 32-bit result N,Z page 3-75
MVN, MVNS Rd, Op2 Move NOT N,Z,C page 3-50
NOP - No Operation - page 3-165
ORN, ORNS {Rd,} Rn, Op2 Logical OR NOT N,Z,C page 3-44
ORR, ORRS {Rd,} Rn, Op2 Logical OR N,Z,C page 3-44
PKHTB , PKHBT {Rd,} Rn, Rm, Op2 Pack Halfword - page 3-108
Table 3-1 Cortex-M4 instructions (continued)
Mnemonic Operands Brief description Flags Page