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ARM Cortex-M4 - Page 51

ARM Cortex-M4
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The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-4
ID121610 Non-Confidential
POP reglist
Pop registers from stack - page 3-34
PUSH reglist
Push registers onto stack - page 3-34
QADD {Rd,} Rn, Rm
Saturating double and Add Q page 3-98
QADD16 {Rd,} Rn, Rm
Saturating Add 16 - page 3-98
QADD8 {Rd,} Rn, Rm
Saturating Add 8 - page 3-98
QASX {Rd,} Rn, Rm
Saturating Add and Subtract with Exchange - page 3-100
QDADD {Rd,} Rn, Rm
Saturating Add Q page 3-102
QDSUB {Rd,} Rn, Rm
Saturating double and Subtract Q page 3-102
QSAX {Rd,} Rn, Rm
Saturating Subtract and Add with Exchange - page 3-100
QSUB {Rd,} Rn, Rm
Saturating Subtract Q page 3-102
QSUB16 {Rd,} Rn, Rm
Saturating Subtract 16 - page 3-102
QSUB8 {Rd,} Rn, Rm
Saturating Subtract 8 - page 3-102
RBIT Rd, Rn
Reverse Bits - page 3-53
REV Rd, Rn
Reverse byte order in a word - page 3-53
REV16 Rd, Rn
Reverse byte order in each halfword - page 3-53
REVSH Rd, Rn
Reverse byte order in bottom halfword and sign extend - page 3-53
ROR, RORS Rd, Rm, <Rs|#n>
Rotate Right N,Z,C page 3-46
RRX, RRXS Rd, Rm
Rotate Right with Extend N,Z,C page 3-46
RSB, RSBS {Rd,} Rn, Op2
Reverse Subtract N,Z,C,V page 3-41
SADD16 {Rd,} Rn, Rm
Signed Add 16 GE page 3-54
SADD8 {Rd,} Rn, Rm
Signed Add 8 GE page 3-54
SASX {Rd,} Rn, Rm
Signed Add and Subtract with Exchange GE page 3-60
SBC, SBCS {Rd,} Rn, Op2
Subtract with Carry N,Z,C,V page 3-41
SBFX Rd, Rn, #lsb, #width
Signed Bit Field Extract - page 3-116
SDIV {Rd,} Rn, Rm
Signed Divide - page 3-94
SEL {Rd,} Rn, Rm
Select bytes - page 3-70
SEV
- Send Event - page 3-166
SHADD16 {Rd,} Rn, Rm
Signed Halving Add 16 - page 3-55
SHADD8 {Rd,} Rn, Rm
Signed Halving Add 8 - page 3-55
SHASX {Rd,} Rn, Rm
Signed Halving Add and Subtract with Exchange - page 3-56
SHSAX {Rd,} Rn, Rm
Signed Halving Subtract and Add with Exchange - page 3-56
SHSUB16 {Rd,} Rn, Rm
Signed Halving Subtract 16 - page 3-58
SHSUB8 {Rd,} Rn, Rm
Signed Halving Subtract 8 - page 3-58
Table 3-1 Cortex-M4 instructions (continued)
Mnemonic Operands Brief description Flags Page

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