Rohde & Schwarz FSVA - 3.7.6 Description of the LVDS Connector

Instrument Functions
R&S
®
FSVA/FSV
516Operating Manual 1176.7510.02 ─ 09
Message Possible solutions
"Number of I/Q Capture Samples too high!"
●
Reduce the number of I/Q samples
●
Reduce the ratio
input sample rate / sample rate
by increasing the sample rate or descreasing the
input sample rate
Keyword: "FIFO OVL" Reduce the input sample rate
3.7.6 Description of the LVDS Connector
The R&S Digital I/Q Interface is a proprietary LVDS serial interface. For adaption to
industrial standard interfaces use the R&S EX-IQ-BOX (see the "R&S®EX-IQ-BOX -
External Signal Interface Module Manual". The EX-IQ-Box functionality is not suppor-
ted for R&S FSVA/FSV models 1321.3008Kxx.).
The LVDS Connector is a 26 pin female 0.050" Mini D Ribbon connector (e.g.: 3M
102XX-1210VE series).
For the connection, use the cables provided with the R&S EX-IQ-BOX or an
R&S®SMU-Z6 cable (order no.: 1415.0201.02).
Figure 3-39: LVDS connector on the R&S
FSVA/FSV rear panel, connector front view
The Table 3-21 shows the multiplexed data at the output of the LVDS transmitter.
Table 3-21: LVDS connector pin description
Pin Signal Level
1 reserved for future use
2 GND 0V Ground, shield of pair 1-14, for future use
3 SDAT0_P LVDS Serial data channel 0 positive pin; carries the bits VALID, ENABLE,
MARKER_1 (GP4), Reserve_1 (GP2), RE_0, RE_1
4 SDAT1_P LVDS Serial data channel 1 positive pin; carries the bits RE_2, RE_3, RE_4,
RE_5, RE_6, RE_7
5 SDAT2_P LVDS Serial data channel 2 positive pin; carries the bits RE_8, RE_9, RE_10,
RE_11, RE_12, RE_13
6 CLK1_P LVDS Clock 1 positive pin; clock for transmission on LVDS link
7 S_CLK TTL (for future use)
8 +5VD +5.0V Supply voltage (for future use)
Instrument Functions - R&S Digital I/Q Interface (Option R&S FSV-B17)