Remote Control
R&S
®
FSVA/FSV
596Operating Manual 1176.7510.02 ─ 09
Bit No. Meaning
6 Digital I/Q Input FIFO Overload
This bit is set if the input transfer rate is too high. The R&S FSVA/FSV can process a max-
imum transfer rate of 128MHz.
7 not used
8 Digital I/Q Output Device connected
This bit is set if a device is recognized and connected to the Digital I/Q Output.
9 Digital I/Q Output Connection Protocol in progress
This bit is set while the connection between analyzer and digital I/Q data signal sink (e.g.
R&S SMW, R&S Ex-I/Q-Box) is established.
10 Digital I/Q Output Connection Protocol error
This bit is set if an error occurred while the connection between analyzer and digital I/Q
data signal sink (e.g. R&S SMW, R&S Ex-I/Q-Box) is established.
11-14 not used
15 This bit is always set to 0.
STATus:QUEStionable:FREQuency Register
The STATus:QUEStionable:FREQuency register contains information about the condi-
tion of the local oscillator and the reference frequency.
You can read out the register with STATus:QUEStionable:FREQuency:
CONDition? or STATus:QUEStionable:FREQuency[:EVENt]?.
Table 4-8: Meaning of the bits used in the STATus:QUEStionable:FREQuency register
Bit No. Meaning
0 OVEN COLD
This bit is set if the reference oscillator has not yet attained its operating temperature. "OCXO"
is displayed.
1 LO UNLocked
This bit is set if the local oscillator no longer locks. "LOUNL" is displayed.
2 to 7 Unused
8 EXTernalREFerence
This bit is set if you have selected an external reference oscillator but did not connect a useable
external reference source.
In that case the synthesizer can not lock. The frequency in all probability is not accurate.
9 to 14 Unused
15 This bit is always 0.
STATus:QUEStionable:LIMit Register
The STATus:QUEStionable:LIMit register contains information about the results of a
limit check when you are working with limit lines.
The number of LIMit registers depends on the number of measurement windows avail-
able in any operating mode.
Remote Control - Basics
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