DocID018909 Rev 11 1267/1731
RM0090 USB on-the-go full-speed (OTG_FS)
1368
Bit 8 SRPCAP: SRP-capable
The application uses this bit to control the OTG_FS controller’s SRP capabilities. If the core
operates as a non-SRP-capable
B-device, it cannot request the connected A-device (host) to activate V
BUS
and start a
session.
0: SRP capability is not enabled.
1: SRP capability is enabled.
Note: Accessible in both device and host modes.
Bit 7 Reserved, must be kept at reset value.
Bit 6 PHYSEL: Full Speed serial transceiver select
This bit is always 1 with write-only access.
Bits 5:3 Reserved, must be kept at reset value.
Bits 2:0 TOCAL: FS timeout calibration
The number of PHY clocks that the application programs in this field is added to the full-
speed interpacket timeout duration in the core to account for any additional delays
introduced by the PHY. This can be required, because the delay introduced by the PHY in
generating the line state condition can vary from one PHY to another.
The USB standard timeout value for full-speed operation is 16 to 18 (inclusive) bit times. The
application must program this field based on the speed of enumeration. The number of bit
times added per PHY clock is 0.25 bit times.
Table 200. TRDT values
AHB frequency range (MHz)
TRDT minimum value
Min. Max
14.2 15 0xF
15 16 0xE
16 17.2 0xD
17.2 18.5 0xC
18.5 20 0xB
20 21.8 0xA
21.8 24 0x9
24 27.5 0x8
27.5 32 0x7
32 - 0x6
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