STMicroelectronics STM32F405 User Manual

Serial peripheral interface (SPI) RM0090
902/1731 DocID018909 Rev 11
When the master clock is disabled (MCKOE bit cleared):
F
S
= I2SxCLK / [(16*2)*((2*I2SDIV)+ODD))] when the channel frame is 16-bit wide
F
S
= I2SxCLK / [(32*2)*((2*I2SDIV)+ODD))] when the channel frame is 32-bit wide
Table 126 provides example precision values for different clock configurations.
Note: Other configurations are possible that allow optimum clock precision.
Table 126. Audio frequency precision (for PLLM VCO = 1 MHz or 2 MHz)
(1)
Master
clock
Target f
S
(Hz)
Data
format
PLLI2SN PLLI2SR I2SDIV I2SODD Real f
S
(Hz) Error
Disabled
8000
16-bit 192 2 187 1 8000 0.0000%
32-bit 192 3 62 1 8000 0.0000%
16000
16-bit 192 3 62 1 16000 0.0000%
32-bit 256 2 62 1 16000 0.0000%
32000
16-bit 256 2 62 1 32000 0.0000%
32-bit 256 5 12 1 32000 0.0000%
48000
16-bit 192 5 12 1 48000 0.0000%
32-bit 384 5 12 1 48000 0.0000%
96000
16-bit 384 5 12 1 96000 0.0000%
32-bit 424 3 11 1 96014.49219 0.0151%
22050
16-bit 290 3 68 1 22049.87695 0.0006%
32-bit 302 2 53 1 22050.23438 0.0011%
44100
16-bit 302 2 53 1 44100.46875 0.0011%
32-bit 429 4 19 0 44099.50781 0.0011%
192000
16-bit 424 3 11 1 192028.9844 0.0151%
32-bit 258 3 3 1 191964.2813 0.0186%
Enabled
8000 don't care 256 5 12 1 8000 0.0000%
16000 don't care 213 2 13 0 16000.60059 0.0038%
32000 don't care 213 2 6 1 32001.20117 0.0038%
48000 don't care 258 3 3 1 47991.07031 0.0186%
96000 don't care 344 2 3 1 95982.14063 0.0186%
22050 don't care 429 4 9 1 22049.75391 0.0011%
44100 don't care 271 2 6 0 44108.07422 0.0183%
1. This table gives only example values for different clock configurations. Other configurations allowing optimum clock
precision are possible.

STMicroelectronics STM32F405 Specifications

General

Brand	STMicroelectronics
Model	STM32F405
Category	Controller
Language	English