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STMicroelectronics STM32F405 User Manual

STMicroelectronics STM32F405
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DocID018909 Rev 11 199/1731
RM0090 Reset and clock control for STM32F42xxx and STM32F43xxx (RCC)
212
6.3.20 RCC Backup domain control register (RCC_BDCR)
Address offset: 0x70
Reset value: 0x0000 0000, reset by Backup domain reset.
Access: 0 wait state 3, word, half-word and byte access
Wait states are inserted in case of successive accesses to this register.
The LSEON, LSEBYP, RTCSEL and RTCEN bits in the RCC Backup domain control
register (RCC_BDCR) are in the Backup domain. As a result, after Reset, these bits are
write-protected and the DBP bit in the PWR power control register (PWR_CR) for
STM32F42xxx and STM32F43xxx has to be set before these can be modified. Refer to
Section 6.1.1: System reset on page 150 for further information. These bits are only reset
after a Backup domain Reset (see Section 6.1.3: Backup domain reset). Any internal or
external Reset will not have any effect on these bits.
Bits 3:2 Reserved, must be kept at reset value.
Bit 1 TIM8LPEN: TIM8 clock enable during Sleep mode
This bit is set and cleared by software.
0: TIM8 clock disabled during Sleep mode
1: TIM8 clock enabled during Sleep mode
Bit 0 TIM1LPEN: TIM1 clock enable during Sleep mode
This bit is set and cleared by software.
0: TIM1 clock disabled during Sleep mode
1: TIM1 clock enabled during Sleep mode
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
BDRST
rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RTCEN
Reserved
RTCSEL[1:0]
Reserved
LSEBY
P
LSERD
Y
LSEON
rw rw rw rw r rw
Bits 31:17 Reserved, must be kept at reset value.
Bit 16 BDRST: Backup domain software reset
This bit is set and cleared by software.
0: Reset not activated
1: Resets the entire Backup domain
Note: The BKPSRAM is not affected by this reset, the only way of resetting the BKPSRAM is
through the Flash interface when a protection level change from level 1 to level 0 is
requested.
Bit 15 RTCEN: RTC clock enable
This bit is set and cleared by software.
0: RTC clock disabled
1: RTC clock enabled
Bits 14:10 Reserved, must be kept at reset value.

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STMicroelectronics STM32F405 Specifications

General IconGeneral
BrandSTMicroelectronics
ModelSTM32F405
CategoryController
LanguageEnglish

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