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RM0090 Chrom-Art Accelerator™ controller (DMA2D)
372
11.5.21 DMA2D register map
The following table summarizes the DMA2D registers. Refer to Section: Memory map for the
DMA2D register base address.
Table 60. DMA2D register map and reset values
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x0000
DMA2D_CR
Reserved
MODE[1:0]
Reserved
CEIE
CTCIE
CAEIE
TWIE
TCIE
TEIE
Reserved
ABORT
SUSP
START
Reset value 00 000000 000
0x0004
DMA2D_ISR
Reserved
CEIF
CTCIF
CAEIF
TWIF
TCIF
TEIF
Reset value 000000
0x0008
DMA2D_IFCR
Reserved
CCEIF
CCTCIF
CAECIF
CTWIF
CTCIF
CTEIF
Reset value 000000
0x000C
DMA2D_FGMAR MA[31:0]
Reset value 00000000000000000000000000000000
0x0010
DMA2D_FGOR
Reserved
LO[13:0]
Reset value 00000000000000
0x0014
DMA2D_BGMAR MA[31:0]
Reset value 00000000000000000000000000000000
0x0018
DMA2D_BGOR
Reserved
LO[13:0]
Reset value 00000000000000
0x001C
DMA2D_FGPFCCR ALPHA[7:0]
Reserved
AM[1:0]
CS[7:0]
Res
START
CCM
CM[3:0]
Reset value 00000000 0000000000 000000
0x0020
DMA2D_FGCOLR APLHA[7:0] RED[7:0] GREEN[7:0] BLUE[7:0]
Reset value 00000000000000000000000000000000
0x0024
DMA2D_BGPFCCR ALPHA[7:0]
Reserved
AM[1:0]
CS[7:0]
Res
START
CCM
CM[3:0]
Reset value 00000000 0000000000 000000
0x0028
DMA2D_BGCOLR APLHA[7:0] RED[7:0] GREEN[7:0] BLUE[7:0]
Reset value 00000000000000000000000000000000
0x002C
DMA2D_FGCMAR MA[31:0]
Reset value 00000000000000000000000000000000
0x0030
DMA2D_BGCMAR MA[31:0]
Reset value 00000000000000000000000000000000
0x0034
DMA2D_OPFCCR
Reserved
CM[2:0]
Reset value 000
0x0038
DMA2D_OCOLR
APLHA[7:0] RED[7:0] GREEN[7:0] BLUE[7:0]
Reserved RED[4:0] GREEN[6:0] BLUE[4:0]
Reserved A RED[4:0] GREEN[4:0] BLUE[4:0]
Reserved ALPHA[3:0] RED[3:0] GREEN[3:0] BLUE[3:0]
Reset value 00000000000000000000000000000000
0x003C
DMA2D_OMAR MA[31:0]
Reset value 00000000000000000000000000000000
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