STMicroelectronics STM32F405 User Manual

USB on-the-go high-speed (OTG_HS) RM0090
1414/1731 DocID018909 Rev 11
OTG_HS I
2
C access register (OTG_HS_GI2CCTL)
Address offset: 0x030
Reset value: 0x0000 0000
Bit 31 Reserved, must be kept at reset value.
Bits 30:24 NPTXQTOP: Top of the nonperiodic transmit request queue
Entry in the nonperiodic Tx request queue that is currently being processed by the MAC.
Bits [30:27]: Channel/endpoint number
Bits [26:25]:
– 00: IN/OUT token
– 01: Zero-length transmit packet (device IN/host OUT)
– 10: PING/CSPLIT token
– 11: Channel halt command
Bit [24]: Terminate (last entry for selected channel/endpoint)
Bits 23:16 NPTQXSAV: Nonperiodic transmit request queue space available
Indicates the amount of free space available in the nonperiodic transmit request queue.
This queue holds both IN and OUT requests in host mode. Peripheral mode has only IN
requests.
00: Nonperiodic transmit request queue is full
01: dx1 location available
10: dx2 locations available
bxn: dxn locations available (0 ≤ n ≤ dx8)
Others: Reserved
Bits 15:0 NPTXFSAV: Nonperiodic TxFIFO space available
Indicates the amount of free space available in the nonperiodic TxFIFO.
Values are in terms of 32-bit words.
00: Nonperiodic TxFIFO is full
01: dx1 word available
10: dx2 words available
0xn: dxn words available (where 0 ≤ n ≤ dx1024)
Others: Reserved
3130 29 282726 25 2423222120191817161514131211109876543210
BSYDNE
RW
Reserved
I2CDATSE0
I2CDEV
ADR
Reserved
ACK
I2CEN
ADDR REGADDR RWDATA
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw

STMicroelectronics STM32F405 Specifications

General

Brand	STMicroelectronics
Model	STM32F405
Category	Controller
Language	English